Method 2: Using analog functional behavioral model developed in Verilog, VHDL or Verilog AMS language. Digital Verification: - Using current standard verification methodologies. Analog Verification: - ...

For verifying analog quantity like voltage, current etc., we should use the Verilog-AMS or Spectre/SPICE languages. Assertion, by definition, captures the behavior of a design. In terms of Verilog-AMS ...