News

DIGITIMES8h
Montage Technology embraces CXL innovation to scale memory and bandwidth for enhanced data center performance
Montage Technology is a global fabless semiconductor design company specializing in data processing and interconnect chip ...
Design-Reuse19h
DFI Group Releases Initial Version of the DFI 5.0 Specification for High-Speed Memory Controller and PHY Interface
AUSTIN, Texas, May 2, 2018 — The DDR PHY Interface (DFI) Group today released version 5.0 of the specification for interfaces between high-speed memory controllers and physical (PHY) interfaces to ...
Tom's Hardware on MSN1d
Nvidia's H20 follow-up in China won't be based on Hopper, says Jensen — Reportedly switching from HBM to GDDR7
Future AI accelerators for China will not use the Hopper architecture, as Jensen Huang hints at a potential switch to ...
Design-Reuse5d
Die-to-Die, High Bandwidth Interconnect PHY in TSMC (N7, N5)
The Synopsys High-Bandwidth Interconnect PHY delivers data rates up to 4Gbps per pin in a flexible architecture that includes up to 80 receive and 80 transmit connections per channel and up to 24 ...